The Conference entitled "3D-IC: Market, Technology & Application" was co-organized by Hong Kong Science & Technology Park Corporation (HKSTPC) and Hong Kong Applied Science and Technology Research Institute (ASTRI) on 17 Aug 2012. The seminar aimed to familiarise the industry with the latest status of 3D-IC mark, technology and application and to provide a valuable platform for both speakers and attendees to exchange their experiences and views about the challenges, solutions and business opportunities of the 3D-IC technologies and products.
Mr. Anthony TAN (CEO, HKSTPC) gave a welcoming remarks before the conference start. Mr. Tan introduced the trend of IC included down size, enhancement of functionality and reliability. Moreover, he told us the new 3D-IC laboratories will be established in April 2013 which collaboration with ASTRI.
Mr. Terence CHAN (Assistant Commissioner (Infrastructure and Quality Services) of Innovation & Technology, Innovation and Technology Commission, The Government of HKSAR) gave a welcoming remarks. He explained HKSAR government supports on HKSTPC and ASTRI.
Prof. Ricky S.W. LEE (President, IEEE Components, Packaging and Manufacturing Technology Society (CPMT)) was guest of honour and gave an opening remark. Prof. Lee explained the 3D-IC was one of future directions. He said "Knowledge grows only by being shared!".
The first keynote speaker was Dr. Ho-Ming TONG (General Manager & Chief R&D Officer, ASE Group, Taiwan) and his presentation entitled "Embracing the Era of SiP".
Dr. Tong briefed the Industry and Package trends and predicted the Web 4.0 for SiP. He said "SiP is Ideal Platform for Heterogeneous Integration such as IC (CMOS, GaAs & SiGe) and Package (LF, BGA, FC, WLP) and it provides more business opportunities for SoC. Standardization is Key to Proliferating Future SiPs (e.g. 2.5D and 3D ICs)."
The second keynote speaker was Mr. Vincent TONG (Senior Vice President of Xilinx, Inc., USA) and his presentation topic was "The Evolution of 3D ICs: Leaping Ahead of Moore's Law to Deliver a 6.8B Transistor Device".
Mr. Tong mentioned that Driver No.1 was Insatiable Intelligent Bandwidth and Driver No.2 was Limitations of Current IC Technologies. 3D ICs sold the concept on Connectivity, Capacity and Crossovers (3Cs). The following diagram showed the 3D structure of 28nm Transistor.
The comparison between Monolithic and Multi-Die FPGA on Capacity, Bandwidth and Power were discussed.
There were no equivalent below:
Capacity - 2M LC vs 1.9M LE
Bandwidth - 1.5TMACs vs 1.2TMACs
Power - 19 Watts vs 112 Watts
The third speaker was Dr. Yutaka TSUKADA (Chair of i-PACKS Consulting and Guest Professor of Ritsumeikan University and Osaka University, Japan) and his presentation named "Flip Chip Technologies, 2D through 3D".
Deformation and underfill effect, as well as, thermal stress around joint on 3D chip were discussed. Moreover, Dr. Tsukada concluded the three packaging in the future included 2D density increase, 3D Chip Stack package and Optical/Electrical Package.
The four speaker was Mr. M. Juergen WOLF (Branch Management of Faunhofer Institute Microintegration (IZM) - Centre "All Silicon System Integration Dresden - ASSID", Germany) and his topic was "3D Wafer Level Integration - Status and Perspective". Key elements for 3D integration were identified into Application, Design and Technology.
3D Technology using TSV/IP is a Key Technology for Packaging and Heterogenous System Integration. Process Readiness for 3D integration using Tapered Silicon Vias (TSV) was also discussed. Finally, Mr. Wolf identified main challenges included Technology, supply chain, design, test, standardization, thermal mamangement, reliability and cost.
Dr. Wei-Chung LO (Director of Industrial Technology Research Institute (ITRI), Taiwan) was the fifth speaker and his topic entitled "Key Features and Challenges of 3D Integration".
ITRI's 3D IC Scope and Business Model were mentioned. High-end products such as multiple chips (homo/hetero) on Si/Glass platform as application and established the infrastructure of 3D integration. The following diagram introduced 3D IC using interposer.
Dr. Gary Peter WIDDOWSON (Technical Director of ASM Pacific Technology Ltd., Hong Kong) was the sixth speaker and he presented the topic was "Challenges and Enabling Technologies for 3D-IC Assembly Processes".
New interconnect technologies such as Thermo-compression bonding (TCB) and Through Silicon Via (TSV) were being evaluated and implemented. Dr. Widdowson shared the machine design concept and some core modules design such as bond head, optic & stage.
The seventh speaker was Dr. Daniel SHI (Director, ASTRI) and his presentation named "Product Oriented TSV Technology for CIS Applications".
Dr. Shi briefed evolution of electronics packaging and identified four key technical challenges on 3D-IC included "Design Method & Tools", "Manufacturing Materials & Equipment", "Tooling & Inspection" and "Testing & Qualification".
Panel Discussion was chaired by Prof. Ricky S.W. Lee.
Reference:
HKSTP Laboratories - http://lab.hkstp.org/default2.asp
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